This invention relates generally to metal gate replacement technology.
In the fabrication of integrated circuits, it is sometimes desirable to selectively replace polysilicon gate structures with metal gate structures. To this end, some of the polysilicon gate structures may be removed and replaced with a metal gate structure.
Dual polysilicon gates are used in conventional complementary metal oxide semiconductor devices to engineer a desired low threshold voltage that is symmetric between NMOS and PMOS devices. Unfortunately, as the device's scale becomes smaller, this approach is not effective. When the polysilicon doping level is not sufficiently high, the polysilicon gate depletion effectively increases the gate dielectric thickness by several Angstroms. This negatively impacts the ability to scale gate dielectric thicknesses. Boron penetration and gate resistance may also be an issue for such polysilicon gate technology.
One approach to this problem is to replace the polysilicon gate with a metal gate. More, particularly, one metal gate may be utilized for the NMOS device and a different metal gate may be utilized for the PMOS device.
Thus, it may be desirable to form dual metal gate technology from conventional processing steps that use polysilicon. After the polysilicon has been defined to form the gate electrode for a transistor, the polysilicon may be removed. A different metal may be applied to form each of the NMOS and PMOS transistors.
In many polysilicon gate processes, a silicide is formed on the upper portion of the polysilicon gate. However, the formation of a silicide may make it very difficult to remove the polysilicon gate and to replace that polysilicon gate structure with a metal gate. In addition, the formation of etch byproduct residue may also block the polysilicon gate etch and removal sequence.
One solution to this problem is to overetch the silicide or etch byproduct residue. However, such overetching may result in adverse consequences to other materials. For example, the underlying gate oxide beneath the polysilicon gate may be etched due to the over extended polishing required for removal of the silicide or etch byproduct residue. Another solution is to use a nitride mask on top of the polysilicon to block silicide formation on the polysilicon while allowing silicide formation on the source/drain region.
Generally, a polysilicon opening polish process may result in excessive dishing in the field oxide areas before the nitride on the top of the polysilicon gates is removed. If too much of the field oxide is lost, then the metal gate height is reduced and there may not be enough oxide left to reliably prevent the dishing in the damascene polish step from exposing the silicon surface.
Thus, there is a need for an improved technique for removing polysilicon gates as part of a metal gate replacement technology.